Technology thesis · Semiconductors & Chips
high conviction growthChiplets and heterogeneous integration
Chiplets have won the architecture argument; advanced-packaging capacity, not transistor density, now sets how many leading-edge AI accelerators the industry can actually ship.
Position maintained continuously · last reviewed Jun 24, 2026
The thesis
Core thesis
Instead of monolithic chips on the latest node, chiplets combine specialised dies (logic, memory, I/O) from different process nodes into one package. AMD pioneered this with EPYC. Intel's Foveros and TSMC's SoIC enable 3D stacking. This shifts the competitive axis from transistor density to packaging and integration — exactly where TSMC dominates.
State of the art (2026)
Advanced packaging now decides how much AI silicon ships, not transistor scaling. TSMC is ramping CoWoS from roughly 75–80k wafers a month toward a 120–130k target by end-2026, yet lines stay sold out against demand near a million wafers. NVIDIA Rubin entered production at CES 2026 for second-half volume, and AMD MI400 follows in 2H 2026, both pairing chiplet logic with HBM4 that SK hynix began mass-producing in late 2025, with Samsung following in early 2026. UCIe reached its 3.0 specification in August 2025, and Qualcomm closed its 2.4bn Alphawave Semi buy in December 2025 to own die-to-die IP. Hybrid bonding, co-packaged optics and Chinese OSAT scaling are the next contested fronts.
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Signal stack
Evidence stacked leading → lagging
Technology-native KPIs
Metrics that predict trajectory, tracked over time
Landscape map
Who builds what — and who depends on whom
Catalyst calendar
Dated events that will move the position
Technology roadmap
Milestones on the path to maturity
Watchlists
Companies, people and papers — each with a remove-by condition
Decision frameworks
The same call, framed for your desk
Thesis changelog
When our view changed, and why
Change our mind
3 disconfirming conditions
The rest is inside
You've read the verdict. The file is much deeper.
The full signal stack, technology-native KPIs tracked over time, the landscape of who depends on whom, the dated catalyst calendar, decision frameworks for every desk, live watchlists and the changelog of every time our call on Chiplets and heterogeneous integration has changed — all live inside CanaryIQ.